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VLSI

Course Instructor: Talent Shine

₹498.00

(excluding GST & gateway fee)

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Course Overview

Module Name

Description

Advanced Digital Design

·       Introduction to Digital Design and Switching Algebra

·       Number Systems and Binary Codes

·       Minimization of Switching Functions

·       Combinational Circuit Design

·       Sequential Circuit Design

·       Controller Design Using FSMs & ASMs

·       Design of CPLDs (PAL, PLA, PROM)

·       Design Examples & Case Studies

Hardware Description Language (Verilog HDL)

·       Introduction to Verilog HDL & Hierarchical Modeling Concepts

·       Lexical Conventions & Data Types

·       System Tasks & Compiler Directives

·       Modules, Ports and Module Instantiation Methods

·       Combinational Logic Design and Sequential Logic Design

·       Modeling Methods.

·       Design Verification Using Test Benches

FPGA Architecture And Prototyping

·       Introduction to Programmable Logic and FPGA

·       Popular CPLD & FPGA Families

·       Architecture of Popular Xilinx and Altera FPGAS

·       FPGA Design Flow 

·       ASIC Design Flow

·       Logic Synthesis for FPGA

·       Static Timing Analysis

CMOS Base Design Concepts

·       Introduction to CMOS

·       MOS Fundamentals

·       MOSFET VI Characteristics

·       CMOS Inverter Design

·       Combinational Logic Design

·       Layouts and Stick Diagram

·       Fabrication Process

·       Sequential Logic Design

CMOS Analog VLSI Design

·       Introduction to Analog Ic Design

·       Short Channel Effects

·       Current Mirrors

·       Amplifiers

·       Feedback Circuits

·       Frequency Response of Amplifiers

·       Noise

·       Operational Amplifier Stability And Frequency Compensation

Design For Testability

·       Fault Types and Models

·       Controllability & Observability

·       Ad Hoc Testable Design Techniques

·       Built-In Self Test Techniques

Low Power VLSI Design

·       Low Power CMOS Logic Circuits: Over View of Power Consumption

·       Low-Power Design Through Voltage Scaling

·       Interconnect Design, Power Grid And Clock Design

Final Project

·       FIFO

·       Traffic Light controller

·       Elevator Controller

·       PISO/SIPO

·       Hrs:Min

Schedule of Classes

Course Curriculum

1 Subject

VLSI

4 Exercises39 Learning Materials

Getting Started

Welcome Note

PDF

Profile Update

External Link

Introduction

Introduction

Video
00:12:25

Number System

Number System - 1

Video
00:24:35

Number System - 2

Video
00:23:34

Number System - 3

Video
00:17:24

Logic Circuits

Logic Circuits - 1

Video
00:12:44

Logic Circuits - 2

Video
00:15:24

Logic Circuits - 3

Video
00:16:13

Combinational Circuits

Combinational circuits - 1

Video
00:26:25

combinational circuits - 2

Video
00:16:45

Combinational Circuits - 3

Video
00:20:07

combinational circuits - 4

Video
00:11:41

Combinational Circuits - 5

Video
00:25:41

Sequential Circuits

Sequential Circuits - 1

Video
00:45:03

Sequential Circuits - 2

Video
00:27:27

Sequential Circuits - 3

Video
00:31:40

Sequential Counter

Video
00:44:15

Finite State Machines

Finite State Machines

Video
00:29:21

Memory

Video
00:19:44

Verilog

Verilog - 1

Video
00:14:53

Verilog - 2

Video
00:16:11

Verilog - 3

Video
00:12:57

Verilog - 4

Video
00:24:29

Verilog - 5

Video
00:24:14

Verilog - 6

Video
00:18:20

Verilog - 7

Video
00:27:52

Verilog_Demo

Video
00:17:49

Behavioral Modelling

Video
00:29:23

Tasks & Functions

Video
00:18:13

Programs

Video
00:51:07

Assignments

Assignment - 1

Assignment

Assignment Answers - 1

Video
00:15:19

Assignment - 2

Assignment

Assignment - 2 Answers

Video
00:16:18

Assignment - 3

Assignment

Project

Project

Video
00:35:40

Certificate

Profile Update

PDF

Profile Update

External Link

VLSI_Assessment

Exercise

Model Program Book

Model Program Book

PDF

Chapters_Sample (for Reference)

PDF

Activity Log_Sample (for Reference)

PDF

Course Instructor

tutor image

Talent Shine

86 Courses   •   39927 Students